| By Maureen O'Gara | Article Rating: |
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| April 25, 2009 03:00 PM EDT | Reads: |
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Trying to get the best of Intel, which trounced it with the quad-core Nehalem, AMD said Wednesday during a webcast updating its rollout schedule that its so-called Opteron Magny-Cours chip, a 45nm piece of silicon with eight to 12 cores and due in 1Q10, was sampling now.
It said it would send out seed units in the second half of this year and expected OEMs to have 2P and 4P systems out in the first half of next year.
The widget is based on what AMD calls its Direct Connect Architecture (DCA) 2.0. It appears that AMD has abandoned the so-called native approach of putting all the cores on one piece of silicon that was supposed to make AMD's first quad-core, the Barcelona, so utterly chi-chi and proved instead to be disastrous.
Magny-Cours is going the way of Intel's just-get-it-out approach and packages either two four-core chips together or two six-core, according to the
Wall Street Journal, which teased the admission out of a shy AMD.
Anyway, Intel was supposed to have eight-core Nehalems out by the end of this year but it now looks more like 2010. Nehalem, by the way, is a native quad-core.
AMD also mentioned a 32nm Magny-Cours follow-on called Interlagos, due in 2011, that's supposed to have 12 and 16 cores again for 2P and 4P platforms.
Both are part of what AMD calls its Marasello Platform, meant to extend into 2012 and 2013.
AMD also said it would have lower-end 1P and 2P San Marino chips: a four-six core 45nm Lisbon and 32nm Valencia in 2010 and 2011, respectively, that are meant to extend into 2012 and 2013, if AMD lasts that long.
It declined to discuss clock speeds despite the fear that each core may be considerably dumbed-down in highly multi-core processors.
The Marasello Platform is the dividing line between AMD's old 2000-2001 Opteron core and its new Bulldozer core.
AMD is using multi-cores to make up for its lack of hyperthreading, an Intel technique.
DCA 2.0 calls for a dozen cores, a four-channel integrated controller, four AMD HyperTransport links, AMD-V 2.0 virtualization support and so-called AMD-P power depreciating widgetry. AMD called it a "usage-based platform design."
Meanwhile, AMD's six-core Istanbul chip is due to launch ahead of schedule in June, promising a 30% performance leap over the Shanghai on which it's based. AMD will start shipping it for revenue next month.
Chip groupie Nathan Brookwood said it looks like "AMD has got its groove back as far as execution goes." It utterly lost it when it botched the Barcelona chip, which came out a year late, costing the company the edge Opteron gave it over Intel.
Brookwood wasn't expecting Istanbul until October.
Apparently Intel hasn't been doing that well with its first six-core, the Dunnington chip, which is unfortunately based on the company's dated front-side bus.
Both Istanbul and Magny-Cour promise absolute performance-per-watt gains.
Oh, yes, and on Earth Day AMD pushed out 40W Opteron EE quad-core, its lowest-power part meant for very dense environments such as cloud computing and web serving.
Published April 25, 2009 Reads 4,224
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More Stories By Maureen O'Gara
Maureen O'Gara the most read technology reporter for the past 20 years, is the Cloud Computing and Virtualization News Desk editor of SYS-CON Media. She is the publisher of famous "Billygrams" and the editor-in-chief of "Client/Server News" for more than a decade. One of the most respected technology reporters in the business, Maureen can be reached by email at maureen(at)sys-con.com or paperboy(at)g2news.com, and by phone at 516 759-7025. Twitter: @MaureenOGara
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